z*******n
发帖数: 1034 | 1 http://support.apple.com/kb/ht5570
Frequently asked questions about two-step verification for Apple ID
Get answers to frequently asked questions about two-step verification for
Apple ID.
What is two-step verification for Apple ID?
Two-step verification is an optional security feature for your Apple ID. Two
-step verification requires you to verify your identity using one of your
devices before you can take any of these actions:
Sign in to My Apple ID to manage your account
Make an iTunes... 阅读全帖 |
|
l**t
发帖数: 10440 | 2 Senior ASIC Verification Engineer in Marvell Semiconductor:
Resposibilities include:
*Participate in early reviews of IP definition and architecture development
*Develop verification testplan for new design, build test bench, models,
test cases
*Interact with design team
*Perform rtl code coverage
Desired Skills & Experience:
*BS/MS degree in EE or CS with 5+ years of working experience in
Verification.
*Must have knowledge and experience of ASIC verification flows and
methodologies*Good Knowled... 阅读全帖 |
|
l**t
发帖数: 10440 | 3 Senior ASIC Verification Engineer in Marvell Semiconductor:
Resposibilities include:
*Participate in early reviews of IP definition and architecture development
*Develop verification testplan for new design, build test bench, models,
test cases
*Interact with design team
*Perform rtl code coverage
Desired Skills & Experience:
*BS/MS degree in EE or CS with 5+ years of working experience in
Verification.
*Must have knowledge and experience of ASIC verification flows and
methodologies*Good Knowled... 阅读全帖 |
|
b*****f
发帖数: 851 | 4 大家好，我想问一下Editor's verification letter请哪个编辑写好呢？比如说我为A
杂志审稿10篇，其中有3个不同的编辑的邀请.
方法1、给这三个不同的编辑写信，请求出具Editor's verification letter，证明我
被邀请审稿是因为我被认定为本领域的专家，只要有一个编辑愿意帮忙即可？不过问题
是这个编辑可能只邀请我审稿2篇，我能在Editor's verification letter里面说“因
为我被认定为本领域的专家，所以该杂志邀请我审稿10篇”吗？
方法2、直接给editor-in-chief写信，请求出具Editor's verification letter，证明
我被邀请审稿是因为我被认定为本领域的专家。就怕主编不回信啊。。。
方法3、给associate editor写信，请求出具Editor's verification letter，证明我
被邀请审稿是因为我被认定为本领域的专家。但是一个杂志经常有很多的associate
editor,是不是得挨个发信问他们看是否愿意帮我出具Editor's verification let... 阅读全帖 |
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C********k
发帖数: 84 | 5 工作地点：Newport Beach, California.
Job Description and Responsibilities:
" DRC/LVS and extraction verification support for SOC and Analog Mixed
Signal Designs
" Write and implement custom DRC/LVS and extraction rules
" Maintain and update physical verification tools and foundry rule
decks
" Support tapeout tasks, assist layout engineers in understanding and
fixing layout errors, run DFM and CMP/Yield Enhancement scripts if
needed.
" Inte... 阅读全帖 |
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h*******y
发帖数: 896 | 6 send me your resume if your background matches this position very well
========================================
Job Posting: Feb 14, 2011
Primary Location: US-TX-Austin-Oak Hill (TX30)
Job: IC Design
Education Level: Bachelor's Degree
Job Type: Recent Graduate
Expectations include:
Verification planning;
Verification test bench infrastructure and environment development and
implementation;
Development of verification testbench components such as drivers, monitors,
response checkers;
Development ... 阅读全帖 |
|
l********s
发帖数: 358 | 7 【 以下文字转载自 Visa 讨论区 】
发信人: leileicats (Seeking a job in EDA industry), 信区: Visa
标 题: 请教H1B签证的Employment verification letter
发信站: BBS 未名空间站 (Mon Dec 14 23:34:48 2009, 美东)
精华区的H-1B签证的checklist有提到Employment verification letter？请问
Employment verification letter是些什么内容？这个letter是必需的吗？
我刚在加拿大毕业，之前没有在美国的工作经历，所以这次是在加拿大签新的H-1B。律
师给我的document list里面没有提到这个Employment verification letter，如果这
个Employment verification letter就是关于职位的描述和职位的薪水的话，这些都在
H1B petition package里面有描述啊！
谢谢！ |
|
b********t
发帖数: 6 | 8 Postdocs in Robust Speaker Verification
At the Faculty of Engineering and Science, Department of Electronic Systems,
The section for Signal and Information Processing, two postdoc positions in
Robust Speaker Verification are open for appointment from May 1, 2015, or
as soon as possible thereafter. The positions are available for a period of
2 years. The Department of Electronic Systems is one of the largest
departments at Aalborg University with a total of more than 300 employees.
The department... 阅读全帖 |
|
发帖数: 1 | 9 看到不少童鞋因为H1b extension需时太长， 面临驾照过期的问题。
share 一下我的律师建议的解决办法。
我就是带上驾照，护照， 就的797 form, 新的H1B extension receipt notice 去DPS.
1. 告知工作人员你的工作签证办理未批复， 然后驾照马上过期
2。 工作人员会登记你的资料， 然后告诉你要1-3 周时间才拿到SAVE 的结果 （结果
会寄到家里）； 有最近半年的出入境记录的话， 据说在DPS 输入资料后会有马上批复
的。
3。 我等了三周 （因为三年没有回国了），拿到批复再去。DPS, 然后给我临时续了8
个月的驾照。
本人在德州。不知道其他州也可以用这个办法不。
摘要律师文件里的内容如下：
SAVE Verification
The Systematic Alien Verification for Entitlements (SAVE) program is a
service provided by the US
Citizenship and Immigration Services (USCIS) that allows... 阅读全帖 |
|
a******n
发帖数: 55 | 10 Please email: m**[email protected]
Job Description
In this position, the individual will participate in the logic design and
verification of NAND Flash memory products.
Main responsibilities include:
- Development of SystemVerilog TestBench for NAND Flash chips
- Full-chip verification on Flash memory projects with SVTB.
Other responsibilities include:
- Support of SystemVerilog Assertion
- Behavioral modeling in SystemC and C++
- Support of design and verification meth... 阅读全帖 |
|
x**1
发帖数: 892 | 11 formal verification 和 verification 应该totally 两马事情。fv现在根本不需要学
什么东西全都是tool来的。
verification 分的是functional verification还是direct test. direct test 就像
实际应用一样,主要搭系统写testbench写c
function verification看个vmm吧 但这玩意其实也不是这么火爆，花的时间多不一定
出活 |
|
s*******6
发帖数: 206 | 12 看了那个学校的hire procedure是说会给所有面试的人或要录用的人background
verification，可我这个是在面试后的第三周了，再给我做background verification.
那个学校的人没有和我联系说给我offer的事，现在有点懵了，不知道事什么意思。如
果要给我offer,为什么学校还不联系我，是要verification之后再给我吗？还是说给所
有的interview的人都要verificaiton，可这就更奇怪了，都面试完几周了，如果不给
我offer，还给我background verification就让我费解了。
先谢谢各位高人指点！！！ |
|
f*********r
发帖数: 674 | 13 Description
Responsibilities:
* Verification of a high performance CPU pipeline at a core/FC level
both
architecturally and micro-architecturally
* Development and maintenance of test generation tools for the CPU
at pre-silicon and post-silicon levels.
* Work closely with other verification engineers to incorporate testing
feedback into the test generation tool
* Understand micro-architecture of the block to be verified, and develop
and execute
testplans f... 阅读全帖 |
|
e*******s
发帖数: 147 | 14 各位牛人哥哥姐姐大家好！
我是刚毕业的硕士，人在湾区，但不介意relocation,有过一年的美国大公司实习经验
，想找一下Digital ASIC的职位，Design， Verification，Validation，Application
我都愿意做，恳求各位牛人哥哥姐姐内推一下，不胜感激！
下面是我的skill set，请站内联系或邮件[email protected]
/* */
我知道不能白白让您帮忙，如果合适的话，事成之后我送您500～1000刀的礼物作为感
谢！
SKILL-SET
Specialties: ASIC Digital Design, Verilog (RTL) Coding, C/C++, PERL/TCL/
Python, SystemVerilog
STA: Timing model generation, Static Timing Analysis, Timing Closure, Power
and clock distribution, Set-up and Hold, Timing Fix
Backend design: Syn... 阅读全帖 |
|
e*******s
发帖数: 147 | 15 各位牛人哥哥姐姐大家好！
我是刚毕业的硕士，人在湾区，但不介意relocation,有过一年的美国大公司实习经验
，想找一下Digital ASIC的职位，Design， Verification，Validation，Application
我都愿意做，恳求各位牛人哥哥姐姐内推一下，不胜感激！
下面是我的skill set，请站内联系或邮件[email protected]
/* */
我知道不能白白让您帮忙，如果合适的话，事成之后我送您500～1000刀的礼物作为感
谢！
SKILL-SET
Specialties: ASIC Digital Design, Verilog (RTL) Coding, C/C++, PERL/TCL/
Python, SystemVerilog
STA: Timing model generation, Static Timing Analysis, Timing Closure, Power
and clock distribution, Set-up and Hold, Timing Fix
Backend design: Syn... 阅读全帖 |
|
l********s
发帖数: 358 | 16 精华区的H-1B签证的checklist有提到Employment verification letter？请问
Employment verification letter是些什么内容？这个letter是必需的吗？
我刚在加拿大毕业，之前没有在美国的工作经历，所以这次是在加拿大签新的H-1B。律
师给我的document list里面没有提到这个Employment verification letter，如果这
个Employment verification letter就是关于职位的描述和职位的薪水的话，这些都在
H1B petition package里面有描述啊！
谢谢！ |
|
h**********y
发帖数: 114 | 17 主副申请人分开交485需要两份Employment Verification Letter原件吗？
1. 主申请人（H1b）这个月初刚交485里面放了Employment Verification Letter原件.
2. 配偶（H4)准备下个月补交485，补交的时候提交上面Employment Verification
Letter的复印件可以吗？ 还是要再去开一份新的Employment Verification Letter原
件？ 谢谢！ |
|
h**********y
发帖数: 114 | 18 主副申请人分开交485需要两份Employment Verification Letter原件吗？
1. 主申请人（H1b）这个月初刚交485里面放了Employment Verification Letter原件.
2. 配偶（H4)准备下个月补交485，补交的时候提交上面Employment Verification
Letter的复印件可以吗？ 还是要再去开一份新的Employment Verification Letter原
件？ 谢谢！ |
|
e*******s
发帖数: 147 | 19 各位牛人哥哥姐姐大家好！
我是刚毕业的硕士，人在湾区，但不介意relocation,有过一年的美国大公司实习经验
，想找一下Digital ASIC的职位，Design， Verification，Validation，Application
我都愿意做，恳求各位牛人哥哥姐姐内推一下，不胜感激！
下面是我的skill set，请站内联系或邮件[email protected]
/* */
我知道不能白白让您帮忙，如果合适的话，事成之后我送您500～1000刀的礼物作为感
谢！
SKILL-SET
Specialties: ASIC Digital Design, Verilog (RTL) Coding, C/C++, PERL/TCL/
Python, SystemVerilog
STA: Timing model generation, Static Timing Analysis, Timing Closure, Power
and clock distribution, Set-up and Hold, Timing Fix
Backend design: Syn... 阅读全帖 |
|
T******T
发帖数: 3066 | 20 DFT -> Design for test, it really is not directly related to ASIC
Verification field, but is an integral part of ATE testing so it doesn't
hurt to get some early exposure into it.
As for books on the Verification field, I really can't recommend any.
All the verif specific languages I've used like Vera and SystemC was on
the job self training. I would recommend that you visit the web site
www.asic-world.com. This is maintained by a Senior Verification Engineer
in India, and he does quite a good j |
|
e*******s
发帖数: 147 | 21 各位牛人哥哥姐姐大家好！
我是刚毕业的硕士，人在湾区，但不介意relocation,有过一年的美国大公司实习经验
，想找一下Digital ASIC的职位，Design， Verification，Validation，Application
我都愿意做，恳求各位牛人哥哥姐姐内推一下，不胜感激！
下面是我的skill set，请站内联系或邮件[email protected]
/* */
我知道不能白白让您帮忙，如果合适的话，事成之后我送您500～1000刀的礼物作为感
谢！
SKILL-SET
Specialties: ASIC Digital Design, Verilog (RTL) Coding, C/C++, PERL/TCL/
Python, SystemVerilog
STA: Timing model generation, Static Timing Analysis, Timing Closure, Power
and clock distribution, Set-up and Hold, Timing Fix
Backend design: Syn... 阅读全帖 |
|
S**********e
发帖数: 1325 | 22 目前考完CK, 正在准备CS，计划今年九月申请。忽然想起oasis上有个FORM 327-A是verification is pending。这个样子已经5个月了，会不会有问题啊？这个东西没弄好，会不会今年九月不让申请呢？忽然急了，无心学习了。我下面应该怎么办啊？
下面是oasis的信息：
Credentials Information
Status: Medical education credentials received and verification is pending. ECFMG® sends written notification to applicants concerning the status of their credentials after ECFMG receives and processes the credentials.
Refer to the Medical Education Credentials section of theECFMG
Information Booklet for more informatio... 阅读全帖 |
|
a******n
发帖数: 55 | 23 In this position, the individual will participate in the logic design and
verification of NAND Flash memory products. Main responsibilities include:
Development of SystemVerilog TestBench for NAND Flash chips. Full-chip
verification on Flash memory projects with SVTB. Other responsibilities
include: Support of SystemVerilog Assertions and behavioral modeling in
SystemC and C++. Support of design and verification methodology enhancements.
This position requires an MS degree or equivalent with 5 o |
|
n*****g
发帖数: 365 | 24 fresh PHD. 专业最相关于ASIC设计。想做design.但是ASIC设计的工作要求有几年工作
经验的是最好的。PHD研究和实际的太脱节了。和硕士和有工作经验的比没一点点优势。
Verification有很多opening。有的需要PHD（不知道为什么）。作为一个PHD去做测试
太shame了吧。好像从verification跳到design的组很难很难。但是从design去测试确
是很容易。
该怎么办，verification的彻底不投了？ 专盯着design了。马上要毕业了。怎么办？
前辈请教。 |
|
z**********8
发帖数: 229 | 25 咨询下最近有没有人面过NVIDIA的“VERIFICATION / VALIDATION ENGINEER (Santa
Clara, CA; Beaverton, OR Austin, TX; Huntsville, AL; Durham, NC) ”这个职
位？
The requirement is this job is :
MINIMUM REQUIREMENTS - Minimum GPA: 3.5
• BS or MS in Computer Science or Electrical Engineering
• Internship or Lab Experience with GPU or Processor verification /
validation and software programming.
• Requires strong programming experience in C/C++ and assembly
• Good debug skills
DESIRABLE EXPERIENCE/KNO... 阅读全帖 |
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z**********8
发帖数: 229 | 26 你说的超级无敌难是说？。。。我有问在NV的verification engineer，不过现在还没
回复；design的人说不清楚verification面试啥情况。。关键verification的面经好像
很分散似地，问啥的都有 |
|
b***y
发帖数: 372 | 27 Nvidia (my team) is looking for hardware formal verification engineers.
The preferred candidates should have a background on formal verification,
RTL verification, Verilog, SVA assertions, and scripting (TCL, Perl) skills
. If you don't have any of them, you need to be a quick learner.
I don't have a full job description yet. I would like to hire some one who
is willing to learn new things, like challenges, and good at communicating
with other teams. The position is at Austin, TX.
Please ... 阅读全帖 |
|
q****c
发帖数: 45 | 28 【 以下文字转载自 JobMarket 讨论区 】
发信人: qinyuc (崖山遗老), 信区: JobMarket
标 题: Qualcomm: Hire verification engineer (temp/contractor)
发信站: BBS 未名空间站 (Thu Jan 23 18:35:33 2014, 美东)
Hire verification engineer (temp/contractor),
1. Maintain our regression system using Jenkins/Ruby/Postgresql
2. Use existing tools to monitor/follow up regression issues.
Requirement:
1. Programming, using Ruby is a plus.
2. Infrastructure or verification experience is a plus.
3. Basic windows operation env is a plus.
Working in S... 阅读全帖 |
|
q****c
发帖数: 45 | 29 【 以下文字转载自 JobMarket 讨论区 】
发信人: qinyuc (崖山遗老), 信区: JobMarket
标 题: Qualcomm: Hire verification engineer (temp/contractor)
发信站: BBS 未名空间站 (Thu Jan 23 18:35:33 2014, 美东)
Hire verification engineer (temp/contractor),
1. Maintain our regression system using Jenkins/Ruby/Postgresql
2. Use existing tools to monitor/follow up regression issues.
Requirement:
1. Programming, using Ruby is a plus.
2. Infrastructure or verification experience is a plus.
3. Basic windows operation env is a plus.
Working in S... 阅读全帖 |
|
F*D
发帖数: 361 | 30 【 以下文字转载自 JobHunting 讨论区 】
发信人: azurelan (azure), 信区: JobHunting
标 题: Opening : Senior Verification Engineer
发信站: BBS 未名空间站 (Wed Aug 12 17:22:35 2009, 美东)
In this position, the individual will participate in the logic design and
verification of NAND Flash memory products. The individual's main
responsibilities will include development of SystemVerilog TestBench for
NAND Flash chips and full-chip verification on Flash memory projects with
SVTB. The individual's other responsibilities will includ |
|
a******n
发帖数: 55 | 31 In this position, the individual will participate in the logic design and
verification of NAND Flash memory products. Main responsibilities include:
Development of SystemVerilog TestBench for NAND Flash chips. Full-chip
verification on Flash memory projects with SVTB. Other responsibilities
include: Support of SystemVerilog Assertions and behavioral modeling in
SystemC and C++. Support of design and verification methodology enhancements.
This position requires an MS degree or equivalent with 5 o |
|
m******1
发帖数: 86 | 32 Folks:
I just registered a weibo account to see how the real-name verification
works. here is what I found out:
1. Real name verification only apply to accounts with massive followers,
which should already being verified before the rules are published.
2. no real name verification for regular accounts which I think make sense
as who cares those accounts that had less than 100 followers.
If my finding is correct, I believe the article in below links make sense.
let me know what you think. thanks.... 阅读全帖 |
|
c*******9
发帖数: 6411 | 33 【 以下文字转载自 JobHunting 讨论区 】
发信人: cplus2009 (in the woods (木老虎）), 信区: JobHunting
标 题: Employment verification question
发信站: BBS 未名空间站 (Thu Nov 7 18:47:39 2013, 美东)
If have two jobs A and B, B is consultant company, so you will
need to work for client that need to do background check that include
employment verification, B know you come from A. Will the verification
able to find out that you still currently employed by A which you don not
want B to know. |
|
a******n
发帖数: 55 | 34 In this position, the individual will participate in the logic design and
verification of NAND Flash memory products. Main responsibilities include:
Development of SystemVerilog TestBench for NAND Flash chips. Full-chip
verification on Flash memory projects with SVTB. Other responsibilities
include: Support of SystemVerilog Assertions and behavioral modeling in
SystemC and C++. Support of design and verification methodology enhancements.
This position requires an MS degree or equivalent with 5 o |
|
n******u
发帖数: 79 | 35 刚从学校毕业需要以前工作的employment verification，不仅要时间而且要duty,因为
和老板的关系不是很好，不知道学校老板会不会写这个verification。各位大侠，还有
什么办法可以拿到employment verification with time and duties?万分感谢！！ |
|
a****g
发帖数: 70 | 36 【 以下文字转载自 Immigration 讨论区 】
发信人: arhong (爱我吗？爱你亚), 信区: Immigration
标 题: Employment verification letter instead of original offer letter
发信站: BBS 未名空间站 (Sat May 14 16:48:38 2011, 美东)
准备申请eb-1b
Original offer letter 指明这只是一个三年的职位。所以那个letter用不了了。
学校同意出具一份Employment verification letter,可以写上permanent的意思。
不知道版上有没有xdjm有类似的经历？
递交这样的一个verification letter会不会成功？ |
|
c****n
发帖数: 173 | 37 请问大家在提交EB1A140都需要提供Employment Verification吗？今天我的律师发邮件
说需要准备Employment Verification，这个Employment Verification是必须的吗？谢
谢！！ |
|
c*****w
发帖数: 28 | 38 一个月前找HR写employment verification letter的时候， HR 大妈急着下班， 就快
速写了这么一封，印在letter head上.
To it may concern:
This is a written verification that XXX is employed with DEPARTMENT NAME in
COMPANY NAME since XXX, Her annual salary is XXX.
If I can further assist you, please contact me at XXX-XXX-XXXX.
我也没多想， 就寄出去了。现在 Eb1A 140 和485 已经同时交上去了。同时还交了近
三年的W-2和今年所有的paystubs. 今天在班上考古， 发现大家说employment
verification letter还要写工作职位，具体工作性质，等等。请问这样写回招RFE吗？
有必要找HR重写一封在寄给USCIS吗?
谢谢 |
|
n****o
发帖数: 1167 | 39 H1期间跳槽后到新单位重新走Perm和I140，律师的checklist里yao所有前面工作单位的
verification letter,美国的还算好办，但国内的都离开了十年了，都不知道到哪里去
找人做verification
我记得我第一次走绿卡程序的时候没有要这些工作的verification letter，是不是不
同公司的律师要的材料内容也是不一样的？
版上有知道的吗？ |
|
x****k
发帖数: 2932 | 40 律师就是长期被吐槽的fragomen，按照我的job discription写了个employment
verification letter,写上工作时间，公司名，职责和skill set，让我的ex-employer
签字。但前公司明确禁止HR和经理出具任何非公司标准格式的employment
verification letter，也就是不愿意签这个字，只能给标准格式的letter，只标明工
作时间和公司名。其实想想也合理，这种五花八门job discription和skill set的
employment verification letter人家肯定不会签。
现在律师就把我的case暂时晾着，没说该怎么弄下去。请问大家在打perm时是怎么把
job discription和skill set给附上去的，谢谢了。 |
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e***q
发帖数: 93 | 41 【 以下文字转载自 JobHunting 讨论区 】
发信人: ezfaq (ezfaq), 信区: JobHunting
标 题: Graphics verification internship positions
发信站: BBS 未名空间站 (Mon Oct 24 21:24:01 2011, 美东)
As a member of our Graphics System team in Qualcomm, you will help to
verify our next generation graphics core for wireless devices. In this
position you will help improve and enhance our verification infrastructure
for the architecture design and development using advanced verification
methodologies.
• BS or MS degree in E... 阅读全帖 |
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a******n
发帖数: 55 | 42 In this position, the individual will participate in the logic design and
verification of NAND Flash memory products. Main responsibilities include:
Development of SystemVerilog TestBench for NAND Flash chips. Full-chip
verification on Flash memory projects with SVTB. Other responsibilities
include: Support of SystemVerilog Assertions and behavioral modeling in
SystemC and C++. Support of design and verification methodology enhancements.
This position requires an MS degree or equivalent with 5 o |
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L********r
发帖数: 59 | 43 We have an immediate need for a Digital Design Verification Engineer to
write and modify RTL code, perform synthesis and verification for an
Embedded Microcontroller Sub-System in a Test-Chip for a High-Speed DDR PHY
Interface. The assignment will also involve supporting board-level
diagnostics, test and data collection [ATE and Lab Characterization]. The
consultant will work closely with the PHY Design Team, the Test-Chip
Physical Implementation Team, Package and Board-Designers, and with Sig... 阅读全帖 |
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g**g
发帖数: 1575 | 44 【 以下文字转载自 EE 讨论区 】
【 原文由 PeterQian 所发表 】
System-on-a-Chip Verification - Methodology and Techniques
by Prakash Rashinkar, Peter Paterson, Leena Singh
Hardcover: 392 pages ; Dimensions (in inches): 1.07 x 9.62 x 6.50
Publisher: Kluwer Academic Publishers; (February 2001)
ISBN: 0792372794
Format: pdf
Size: 4.4M
http://groups.yahoo.com/group/sv_dsp/files/
Book Description
System-On-a-Chip Verification: Methodology and Techniques is the
first book to cover verification strategies and methodologies f |
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c****e
发帖数: 1453 | 45 大家可以讨论一下，.这个和testing 相比那个将来更好一些.
formal verification paper不少.不知道工业界的情况.Combinational equivalence
checking没什么作的八.
sequential的太难,没什么突破.很多人发BMC方面的东西，好像这个工业界开始用了。微
软好像对于软件的
verification很感兴趣，有不少人在做 software verification. |
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l********n
发帖数: 9 | 46 I am preparing the PE exam application. There is an examination verification
request. I took FE in one state and plan to take PE in another state. How
can I get the verification? Do I simply send the verification request form
to the board of the state where I took FE? Thank you so much. I am looking
forward to the reply. |
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f*********y
发帖数: 79 | 47 各位大侠 小弟几年5月MS毕业，找到一个verification的工作。以前在国内和这边学的
都是design相关的东西。不知道verification有没有什么好书可以看的？怎么培养验证
思路 写出好的testbench？其实一开始不太想做verification的 后来觉得能学多学点
也很好。
在国内看有人用Vera/System Verilog做验证。这些东西我也是一窍不通，请教如何学
习。
多谢各位 |
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m***e
发帖数: 48 | 48 【 以下文字转载自 SanFrancisco 讨论区 】
发信人: mafie (浪人~苦难中国), 信区: SanFrancisco
标 题: job openning: design verification in AMD (转载)
发信站: BBS 未名空间站 (Mon Aug 16 16:58:19 2010, 美东)
发信人: mafie (浪人~苦难中国), 信区: JobHunting
标 题: job openning: design verification in AMD
发信站: BBS 未名空间站 (Mon Aug 16 16:57:34 2010, 美东)
in case you are interested and qualified, please drop me a line.
Thanks
AMD's Graphics Memory Controller team is seeking an experienced RTL
Verification Engineer to impact areas such as dynamic power savi |
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