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发帖数: 59 | 1 We have an immediate need for a Digital Design Verification Engineer to
write and modify RTL code, perform synthesis and verification for an
Embedded Microcontroller Sub-System in a Test-Chip for a High-Speed DDR PHY
Interface. The assignment will also involve supporting board-level
diagnostics, test and data collection [ATE and Lab Characterization]. The
consultant will work closely with the PHY Design Team, the Test-Chip
Physical Implementation Team, Package and Board-Designers, and with Signal
Integrity Engineers, to ensure first-pass silicon success.
Job Requirements:
MSEE + a minimum of 5 years of relevant experience in Digital Logic Design
and Verification
Must possess extensive previous experience with High-Performance SoC Design
in Deep Sub-Micron Technology Nodes.
Strong preference for candidates having prior experience with Memory
Controllers, the AMBA Bus Protocol, and external peripheral-support.
Strong preference for candidates possessing prior experience with the DDR
PHY Interface [DFI] and DDR PHY Digital Design. |
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