b***n 发帖数: 13455 | 1 it 号称它的input signal can be as small as -30dBm. 我们的一个SB 法国
Technical
Lead非说要达到它的这个要求而不用buffer...我说首先PLL里的frequency divider 用
dBm来度
量input signal level就是个weird的事; 还有这个-30dBm input 几乎可以肯定是还需要
buffer才能到divider input的... 欢迎大家谈谈... |
x***y 发帖数: 830 | 2
需要
when you are getting -30dBm input, you probablly will see the frequency
division, but won't have rail to rail swing at output and your phase noise
will be degraded.
【在 b***n 的大作中提到】 : it 号称它的input signal can be as small as -30dBm. 我们的一个SB 法国 : Technical : Lead非说要达到它的这个要求而不用buffer...我说首先PLL里的frequency divider 用 : dBm来度 : 量input signal level就是个weird的事; 还有这个-30dBm input 几乎可以肯定是还需要 : buffer才能到divider input的... 欢迎大家谈谈...
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b***n 发帖数: 13455 | 3 Thanks! Yes there may still be frequency division, but just not at the
desired ratio...
noise
【在 x***y 的大作中提到】 : : 需要 : when you are getting -30dBm input, you probablly will see the frequency : division, but won't have rail to rail swing at output and your phase noise : will be degraded.
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s******u 发帖数: 142 | 4 This guy tested the divider separately, so they use dBm for the input.
But it's weird for me to see a digital divider paper to put fig. 6, since
min input power vs. frequency curve is usually for ILFD. In a real PLL, you
will not get an input signal as small as -30dBm. Even if -30 dBm can work,
you don't need that small if you don't use the divider separately. |