x******g
发帖数: 319 | 1 This was a java interview question I just got.
What is the best design pattern for the following code problem?
=================================================================
A fashion shop designs cloth. each style has a ID, color, and design date.
The client will order different styles as one order. each order has 10 or 15
styles. so the client can place an order, which has styles according to the
followings:
1) an order has styles in the order of style ID.
2) an order has styles in the orde |
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t**********s
发帖数: 930 | 2 【 以下文字转载自 Database 讨论区 】
发信人: tennisalways (tennisforever), 信区: Database
标 题: How to design a database model related to six degree of separation?
发信站: BBS 未名空间站 (Tue Jul 31 14:43:18 2007)
I am trying to design a database model related to the small world (or six
degree of separation) phenomenon.
With this design, I should be able to write two queries efficiently:
a) How many degrees of separation are there between two people.
(assuming they are connected). You may assume that you do not ha |
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c*********t
发帖数: 2921 | 3 谢谢你推荐的design patttern书。
有没有好的关于OO Design 的书？ |
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s*****n
发帖数: 461 | 4 design pattern不适合学习，是参考书。
这个是很好的教材
Design Patterns Explained A New Perspective on Object Oriented Design |
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H*M
发帖数: 1268 | 5 比如说叫design一个parking lot, elevator，online shopping system.
这些问题应该怎么approach,主要是考察什么方面的知识和能力呢？ OOP和design patt
ern?那么是不是说，一定要考虑到composition,还是inheritance,各自的优缺点要说下
？尽量避免coupling之类的?要不要说个design pattern之类的，比如，singleton,或者
factory.
请牛人们说说怎么approach吧。 |
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s*******e
发帖数: 3042 | 6 design pattern一个很重要的功能是给大家一个交流的common language, 比如说我一
个东西要用singleton实现，知道design pattern的人马上就知道大概是怎么回事，完
全不知道的，要从头解释，就麻烦多了。
design pattern对初学者来说最重要的是给你一些基本的概念，这样你不会错的太离谱
或者总是需要reinvent wheel, 以后水平高了，自然就不受他们的束缚了。
马逊还很喜欢考这 |
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r*****3
发帖数: 143 | 7 Title:Learning Web Design, 4th Edition
By:Jennifer Niederst Robbins
Publisher:O'Reilly Media
Ebook:August 2012
Pages:624
Do you want to build web pages, but have no previous experience? This
friendly guide is the perfect place to start. You’ll begin at square one,
learning how the Web and web pages work, and then steadily build from there.
By the end of the book, you’ll have the skills to create a simple site
with multi-column pages that adapt for mobile devices.
Learn how to use the latest tech... 阅读全帖 |
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c******o
发帖数: 1277 | 8 那些open source项目的committer, 本身就是design pattern的创造者。
他们是第一批用design pattern的。。。
你要是觉得牛人不用design pattern就错了，他们才是开始用的人，然后觉得好，推广
开。 |
|
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g*****g
发帖数: 34805 | 9 Design pattern is nothing but a common practice for a language. It doesn't
surprise me at all FP doesn't use OOP's design patterns. But FP does need
design pattern of their own. e.g. Scala needs this so called cake pattern. |
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c****3
发帖数: 10787 | 10 design pattern啥时候才有的。
很多人写电脑程序，就是为了解决实际问题，设计和思路都是从解决问题的角度出发的
。虽然可能设计和某种design pattern重合，但是人家不需要学习design pattern。
就像古代不少会打仗的人根本不认字，从来不看兵书，虽然战法和某种兵书重合，并不
等于他们学过兵书。 |
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F*M
发帖数: 104 | 11 还是在谈一些形而上学的东西。
design pattern是程序员经验的总结，其实你的话已经回答的你自己 "好多人似乎都是
根据需要解决的问题去设计程序，需要解决什么问题，就会有相应设计"。。。
如果你还在思考套哪个pattern，说明你的火候还不够。不懂design pattern, 不代表
不在用，用了但是不知道其实那是一种design pattern。
计。 |
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n****1
发帖数: 1136 | 12 非常同意这个
这些标准的design pattern,说穿了就是广义上的boxing/unboxing罢了. design
pattern的却能方便沟通, 但如果你整天都在design pattern,就像一researcher的整天
都在presentation,或者开party, 这样的research能有多少干货呢?
你读别人的code觉得恶心,我读别人的paper也常觉得烂,一个道理 可自己写出来的通常
更烂! 不信你过段时间再读读自己的code.
如果你连自己的code都维护不了,凭啥指望人家维护你的code. |
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m****l
发帖数: 71 | 13 几个月前我曾经在这里找人，帮忙做一个基于mean stack的project. 现在我们的项目
接近完成，想再寻找一个会前台，能做design的朋友聊聊，帮我们完善一下。
经过几个月的开发，我们的功能大致ready, 准备开始Alpha test. 同时，我们想请一
个有modern design经验的人帮我们看一下，把界面更现代话，更简洁易用且具有美感
。最好有coding经验，with an eye on design. 有在consumer facing website 公司
或social公司工作过的更好。
我们前台的技术是基于Angular + bootstrap，现在还只是web界面。现在在准备Alpha
test，预计在秋冬之际launch。我们根据experience, 是有pay, 另外的好处是可以和
我们一起经历consumer facing 网站的launch. 根据我们marketing partners的调研，
so far market对我们项目的反响很积极。我们主要在南湾做开发，希望你在湾区，业
余时间能经常commute到南湾和我们meet.
谢谢。 |
|
b***e
发帖数: 1419 | 14 个人经验，仅供参考：真正好得前端加designer没有$150/hr是招不到的。招个半吊子
的搞个不上不下的可能不划算。如果没有serious hourly rate的经济实力，就只能看
画大饼的stock options。你现在这种三无产品的阶段不给到1%也招不到什么正经人。
另外，这本是个公买公卖挺美好一事儿，就甭犹抱琵琶半遮面了。“帮我们看一下"这
种事情是没有的。Design就是design，work就是work，一分钱一分货。
还有就是“可以和我们一起经历consumer facing网站的launch”这个算好处？你在SV
的街上随便拉个什么一天可能要launch consumer facing web application两三次。不
愠不火，过犹不及呀。拉人做startup就俩事儿，钱和股票。什么情怀，经验，职业规
划，都鸡巴扯，还真以为人都是锤子了？startup任何人来讲都是big opportunity
cost。你要真有心在这拉人直接说给多少股票就行了，说别的没屁用。你看那么多回帖
有一个真想上船的么？
Alpha |
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F*********1
发帖数: 38 | 15 如果你有时间，想要系统地学习的话，推荐“四人帮”（the Gang of Four）写的书：
Design Patterns: Elements of Reusable Object-Oriented Software
另外，用C++的，这本书也不错：
Modern C++ Design: Generic Programming and Design Patterns Applied
以上这两本书都是比较经典的，都很值得认真学习。 |
|
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m****s
发帖数: 79 | 17 在网上查的现有的tinyUrl design里，好像没提及怎么从long url找到已经存在的它对
应的short url？
通常的design里，给long url一个数字，然后数字 -> short url
那么如果已经给long url转换成一个short url。
接着，我想查找对于某个特定long url，什么是它对应的short url？
这个要遍历database？
还是有好的design？ |
|
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d*********e
发帖数: 3835 | 19 JOB DUTIES: Responsible for design, fabrication, maintenance, and trouble
shooting of systems comprised of highly integrated hardware and software
components.
JOB SKILLS: Seeking versatile (preferably EE) individual experience in
design, build, and maintenance of highly integrated avionics testing
platforms. Must be able to quickly spin up on existing design projects and
contribute in areas that are behind schedule. The preferred candidate will
have software as well as hardware experience and em |
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y**q
发帖数: 570 | 20 如果我从ncbi search出突变基因sequence，想copy 还有mutant gene sequence 片段
前后 500bp 到相关primer design soft website 运行，找找出primer design
software 推荐 primer. 请问相关 primer design software link 推荐， 多谢！ |
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j*****t
发帖数: 9 | 21 I also think so.Every big name needs physical design.
It is one part of IC design flow.
EDA increasing rate is even higher than semiconductor...
Design automation tools are far away from optimize |
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c******h
发帖数: 454 | 22 Our group (former agere, now LSI) has an high speed analog design position.
send me your resume to my email at c*****[email protected]
At least 2 years experience I think.
Pay should be decent. check myvisajobs agere electrical engineer.
this is very high frequency SiGe bipolar/cmos analog design. must be very
fun.
the position is in MN st. paul area or CO Denvor area.
Analog/Mixed Signal Integrated Circuit Design Position Requirements Include:
BS in Electrical Engineering or equivalent field required. |
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v**c
发帖数: 112 | 23 谢谢楼上各位的指点，那我还是坚定的学IC design吧...
还有些问题：
学校design类的课比较弱，大家遇到这种情况都是怎么补足的？
学校给MS提供graduate assistant的机会，类似RA吧。不谈钱方面的回报了（这学校钱
少的可怜），大家觉得这类经验对找工作帮助大吗？我总觉得不如去自学些东西可能更
好？
最后就是，IC design类有哪些专业的考试啊认证啊之类的呢？
谢谢！ |
|
u***1
发帖数: 25 | 24 【 以下文字转载自 JobHunting 讨论区 】
发信人: USRt1 (只用于计算年龄), 信区: JobHunting
标 题: Analog/Mixed Circuit Designer 招工, Solict Resumes
发信站: BBS 未名空间站 (Thu Oct 18 12:42:12 2007)
Analog/Mixed Circuit Designer 招工, Solict Resumes
Who: One of the largest Semiconductor companies
Where: a few positions in Boston area and Portland, OR area
What: Analog/Mixed Circuit designer, Full time and Graduate student Interns
Level: junior/new colleague graduates and mid level
Contact:k************[email protected]
The job openings are |
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t**o
发帖数: 1030 | 25 你说的是非常基本的，并且，Verilog是HDL，跟ic design的关系。。。（不知你所说
的ic design是何范畴？）
学ic design要有基础和经验 |
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b*****e
发帖数: 1193 | 26 lz问的是ckt design
不是IC design，怎么都推荐IC design的 |
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w****j
发帖数: 237 | 27 一段话概括“PCB design criteria for analog, RF, and mix-signal component
designs”是什么了？
proper grounding, shielding, 诸如此类的？？？有经验的大虾说说~~~ |
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i*****o
发帖数: 9 | 28 【 以下文字转载自 JobHunting 讨论区 】
发信人: iTomato (未名空间 — 新用户), 信区: JobHunting
标 题: Intel -- analog IO circuit design job open
发信站: BBS 未名空间站 (Wed Sep 17 18:08:12 2008)
Export control license is not an issue.
Fresh graduate is encouraged to apply.
http://www.intel.com/jobs/jobsearch/
search for job # 560280
Analog I/O Circuit Design – 560280
Responsibilities and Details
Apply for Job
Description
In this position, you will be a member of a high speed serial I/O circuit
design team in |
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f*******i
发帖数: 696 | 29 面试时候说的是Engineer，结果上班变成Designer了，offer上也是Designer，当时光
顾着看salary傻乐了（偶是农民出身，没见过这么多银子，表鄙视我）。
谁能给讲讲两者的区别？是不是Designer变Engineer可以加点薪。谢谢 |
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c*********t
发帖数: 239 | 30 University of Tulsa石油工程招Mixed Signal IC Design博后
要求基本上就是有几年mixed signal IC design经验，较好的英语水平
过来之后主要是做一个miniature subsurface measurement device的mixed signal IC
design. 符合要求的话最好能在8月份左右就开始工作.
有意者请将简历发至y***********[email protected]或者直接站内发信联系。 |
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w*****r
发帖数: 348 | 31 If a design is synthesized into gate level, how to get its power?
For example, in Design Compiler, we use command report_power, however, the
power is different if the toggle rate of signals are different. I am
confused now, how can we claim the power of a design at gate level?
Thanks |
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d**********y
发帖数: 7 | 32 I am looking for an analog IC design or application engineer position in Bay
area now. Open for relocation. I have 4 years industry experience in US in
IC design and verification (3 years full time + 1 year internship), 5 years
industry experience in China in board level circuit design. If you can
recommend me to your recruiters, would you please let me know your email
address? I will send my resume there.
Thanks. |
|
e****d
发帖数: 5 | 33 Job Title: Senior ASIC Design Engineer/ Group Leader
Brief description of job duties:
路 Maintain and upgrade IC CAD tools such as (Cadence/Xlinix/Calibre
)
路 Perform IC Layout, both top level and analog layout
路 Organize design review meetings and get ready for tape out
submission
路 Interface with foundries and vendors during the design,
simulation, integration and testing of ASIC ICs
路 Provide leadership within the ASIC group and manage daily
activities |
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I***a
发帖数: 704 | 34 1， Design Compiler综合FPGA，提供的cell只包括LUT/register, 不包括swich box,
对吗？LUT的cell description一般是怎样的？
如何表示这个4-input LUT:
0000->可配置
0001->可配置
0010->可配置
...
1111-> 可配置
2. Design Compiler综合FPGA得到的是由LUT/register表示的netlist, 就必然包括了
对LUT的配置位，这些在netlist里面是如何体现的？
例如这个4-input LUT:
0000->1
0001->0
0010->0
...
1111-> 1
3. Design Compiler综合FPGA得到的是由LUT/register表示的netlist, 只包括对LUT的
配置位, 不包括LUT/register的Placement和Switch Box的配置位,
那么LUT/register的Placement和Switch Box的配置位是由什么工具得到的？
Thanks. |
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h*******y
发帖数: 896 | 35 send me your resume if your background matches this position very well
========================================
Job Posting: Feb 15, 2011
Primary Location: US-TX-Austin-Oak Hill (TX30)
Job: IC Design
Education Level: Bachelor's Degree
Job Type: Experienced
Description:
Multimedia SOC Design Verification Engineer – Systems & Architecture
Engineer - Primary responsibilities are the definition, specification and
development of ARM based Multimedia SOC’s. Candidate must be able to work
with sales an... 阅读全帖 |
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m*****t
发帖数: 3477 | 36 design一般偏重技术，而application偏重市场，特别是FAE。
application转design可能会有难度，如果多年不接触技术细节。
design转application比较普遍。 |
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b*********y
发帖数: 830 | 37 工作了， 学校里修完了课过了qualify，老板人比较好，同意挂在他名下继续part
time phd. 自
己要选一个thesis 的方向。
1。 RF front end especially RF power amplifier design. linearization, etc.
有一点企业研究所实习的研究经验。但还是有很多东西要学。
2， high speed I/O design like CDR, PLL. DLL etc.
自己在做这方面的validation的工作，如果选这个方向，以后在现在的公司转designer后可能会顺
手一些。
research都要基本靠自己，因为老板并没有相关项目和funding. 只会帮我提供mosis
流片的机会。公司会给我提供测试的机会。老板要求3篇journal毕业。
请各位从可操作性，发文章容易程度， 前途各个方面给点指导意见。我个人觉得RF比较有趣，但因为现
在做的mixed mode, 以后要换方向找工作， mixed signal 前途比起RF来哪个好？
谢谢！ |
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z*********e
发帖数: 6 | 38 We are looking for a short-listed candidate for a job opening in embedded
firmware design for power electronics systems.
If you are looking for a job offer, and if you have years' experience in
embedded firmware (DSP/MCU) design and solid backgrounds in power
electronics (topology analysis), you may send your resume to: zebrayeh@yahoo
.com
Location of this job is in the united states. In addition, fresh graduates
with M.S.E.E, or even outstanding graduates with B.S.E.E degree from an ABET
colleg... 阅读全帖 |
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b*******1
发帖数: 49 | 39 Hillsboro, Oregon.
有问题请跟贴问， 你的问题可能也是其他同学的问题。
RCG (新毕业生） only。
刚毕业一年之内的也行。
Business Group Overview
Employees in the Intel Architecture Group (IAG) deliver innovative
platforms across computing and communication segments including data centers
, mobile and desktop personal computers, handhelds, embedded devices and
consumer electronics. Intel's industry leading technology is used to create
integrated hardware and software solutions such as processors, chipsets,
communication radios, graphics proc... 阅读全帖 |
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c****p
发帖数: 6474 | 40 【 以下文字转载自 JobHunting 讨论区 】
发信人: chenpp (chenpp), 信区: JobHunting
标 题: 写个IC Design的面经吧
发信站: BBS 未名空间站 (Mon Sep 12 22:02:13 2011, 美东)
版上基本没有IC design的面经，所以在这里写下我自己的经历。有些内容不太方便说，
只是大体讲讲。与其说面经，不如说是面前复习的思路和面后的自我总结。总体感觉是
，对于我来说，只要课程的东西都掌握了，应付HW的面试实际上是比系统地准备算法写
SW代码要轻松一些的。
这个职位说是处理器设计，实际上是验证为主；这也和现在的主流相符：要验证的多，
要设计的少；但是与之矛盾的是，学校教学多强调设计而不重视验证，所以很多学生面
对验证职位都很打怵。我个人感觉是，没必要怕，一方面做过实际project的往往也都做
过验证，另一方面公司也都明白学校验证教得不好，毕业生这方面如果不强他们也理解
。我本人验证方向也很弱，电面和onsite的时候都答得很烂，但是其他方面没出什么纰
漏，所以最后拿到offer。
电面和onsite都主要会考查这... 阅读全帖 |
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m*****t
发帖数: 3477 | 41 【 以下文字转载自 JobHunting 讨论区 】
发信人: badname (牛牛的邻居), 信区: JobHunting
标 题: openning for junior digital IP designer
发信站: BBS 未名空间站 (Tue Oct 25 02:39:32 2011, 美东)
opening for junior digital IP designer in a SF bay area company
We have openning for junior digital IP (transistor level) designer (0~4
years of experience, fresh MS is ok) in a SF bay area company. Please send
resume to f**************[email protected] if you are interested.
Thanks |
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m*****t
发帖数: 3477 | 42 国内也不算新了，我认识不少人03-05就回去了，现在一些公司已经有一定规模了，等
着上市或者被收购呢。那些龟也都已经executive了。
不过做高端产品的的确还不多。这有几个原因，一是高端技术专利在欧美大公司手里，
你就算掌握了，也不敢拿出来自己卖。二也是根本的，analog/rf/power ic 高性能的
，除了长期积累的优秀design，要有特制的process支持，特别是DMOS，和HQ RF, 这也
是为什么和数字不同，这个领域大公司还留着自己的fab。startup量不大foudry不会给
你customized,你去找IDM人家不一定理你，即使给你也很贵。
现在这个阶段，要想自己做，拼IC很难，比较靠谱的找niche application。特别是国
内portable medical领域。 所以拼的不是ic designer，而是FAE。
当然你得有fund，VC的回报预期是3年内，对于ic start up 的design cycle，这也就
是第一个产品刚卖钱的时候。所以后续产品必须跟上，也即是一开始市场把握就很准。
这在国内很不容易。
现在技术类VC明显倾向于周... 阅读全帖 |
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s*****g
发帖数: 8 | 43 There is an immediate job opening for ASIC design verification engineer in
our group. The location is in Santa Clara, CA.
Requirements include:
- MS or PhD in EE, CompE, or equivalent
- Demonstrated skills in digital circuit design and solid understanding of
Verilog or VHDL, knowledge of SystemVerilog is a plus
- Demonstrated skills in ASIC/FPGA design, simulation, and synthesis
- Knowledge of object-oriented programming, such as C++ and Java
If interested, please send resume to g****[email protected]... 阅读全帖 |
|
|
g****t
发帖数: 31659 | 45 AE直接基础客户。很重要的。
你的思路是正确的。design多少有点闭门造车。AE很多时候能听到客户第一手的
最快抱怨投诉，以及需求。
小弟做了6年的analog，一直也是在二流的半导体公司混，曾经试过brcm,qcom之类的，
由于地理位置，身份，还有技术原因，都没跳成。一直也就是做些common block，很杂
，但不像PLL，ADC那样很hot的东西。感觉career上有瓶颈，3-5年之内也不太可能成为
lead。现在有一个机会是给cadence做地区的AE，人家看我有design背景，也用过
virtuouso，ams，这些tool，所以对我感兴趣。之前工作中接触过cadence的AE，基本
上两类事：培训和解答各种tool的问题。感觉其实基本上都是伺候人的差事。让我一辈
子做AE，倒是不太甘心。但是想借这个机会试试换个跑道，5年之后做marketing，中间
可能会读个part time mba。英语还凑合，也不介意和人打交道。做这个AE的好处是可
以锻炼自己的soft skills，不好的地方，就是以后估计和design就得说再见了。求教
过来人，这个career pa... 阅读全帖 |
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e********t
发帖数: 144 | 46 https://schneiderele.taleo.net/careersection/2/jobsearch.ftl
Senior Power Systems Design Engineer
-Full-time
United States-Massachusetts-Billerica
Requisition ID 000A2D
May 18, 2013
REQUIREMENTS:
- Technical Undergraduate degree and Master-level degree in Electrical
Engineering preferred; will also consider a multi-disciplined background
with power systems design experience
- 4+ years of experience, Professional Engineer required (or an additional 3
-4 years of work experience)
- Knowledge ... 阅读全帖 |
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n*********h
发帖数: 98 | 47 代友转发，请勿回信箱，直接发联系人的email。谢谢！
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We are a fast-growing medium-size company located in Silicon Valley,
and currently have a few job openings in analog/mixed-signal design
for high-speed SerDes.
Ideal candidates should have previous circuit-design experiences in at
least one of the following: CDR, PLL/DLL, (wireline) transmitter, data
converter; all levels of experiences are welcome.
The company offers a friendly work environment and opportunities to
wor... 阅读全帖 |
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e*******s
发帖数: 147 | 48 各位牛人哥哥姐姐大家好！
我是刚毕业的硕士，人在湾区，但不介意relocation,有过一年的美国大公司实习经验
，想找一下Digital ASIC的职位，Design， Verification，Validation，Application
我都愿意做，恳求各位牛人哥哥姐姐内推一下，不胜感激！
下面是我的skill set，请站内联系或邮件[email protected]
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我知道不能白白让您帮忙，如果合适的话，事成之后我送您500～1000刀的礼物作为感
谢！
SKILL-SET
Specialties: ASIC Digital Design, Verilog (RTL) Coding, C/C++, PERL/TCL/
Python, SystemVerilog
STA: Timing model generation, Static Timing Analysis, Timing Closure, Power
and clock distribution, Set-up and Hold, Timing Fix
Backend design: Syn... 阅读全帖 |
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w********c
发帖数: 1 | 49 Senior Engineer, Algorithm Design
Reference #:ICDD/VIDEO/1845/150911
Post Date : 14-09-2015
Close Date : 24-09-2015
Job Responsibilities
Visual computing algorithm research and development.
Modelling of visual computing algorithm design for hardware and software
implementations.
Software optimization for efficient execution.
Requirements
PhD / MS or equivalent education with 3+ years experience / BS or equivalent
education with 6+ years experience in Electrical Engineering, Computer
Science or V... 阅读全帖 |
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