L********r
发帖数: 59 | 1 FPGA Engineer:
1. Familiar with Xilinx FPGA system
2. Familiar with Cadence Palladium
3. DSP and communication background is a plus
Analog IC design Engineer (SERDES)
1. Familiar with I/O design
2. Familiar with high-speed serdes
3. Experience on PCIe/SATA and DDR
Analog IC design Engineer (SRAM)
1. Responsible for design and verification of integrated IP blocks
2. Responsibilities could include analog and digital simulation, static
timing analysis, electrical rules verification, contention analysis or
integration of analog and digital blocks with the full chip
3. Minimum of a BSEE and 5 years of relevant industry experience.
4. Knowledge in high speed circuit design techniques, including SRAM
5. Knowledge of simulation, static timing analysis, schematic capture,
layout and electrical verification tools
6. Experience with transistor-level simulation tools such as HSPICE
7. Some experience with design or verification automation using PERL or
other programming/scripting languages
8. Familiar with Verilog RTL
Analog IC layout engineer
1. 65nm/40nm/28nm layout experience
2. High speed digital layout experience
3. Analog layout experience
Please send CV to: j**[email protected] |
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