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ASIC/SoC验证支持工程师。 Austin Office
Requires experience in ASIC design/verification. Technical knowledge of ASIC
design methodologies and technologies is required. Expert knowledge of
Verilog and VHDL is required. 3-5 years hands on experience in various
phases of ASIC design/verification is required. Good communication skills
and ability to interface with customers and R&D is essential.
