a******n
发帖数: 55 | 1 n this position, the individual will be responsible for developing/
supporting physical verification rule decks (LVS/DRC/ERC) for the layout
group, completing placement and routing flow/methodology development,
developing/supporting/calibrating parasitic extraction flow for design
groups, developing the CAD flow for memory design as per the layout and
designing requirements and improving overall productivity for layout group
through various scripts and SKILL programming. The individual will also
develop and apply computer aided design (CAD) software engineering methods,
theories and research techniques in the investigation and solution of
technical problems, assess architecture and hardware limitations, plan
technical projects in the design and development of CAD software, define and
select new approaches and implementation of CAD software engineering
applications and design specifications and parameters and develop routines
and utility programs. Lastly the individual will prepare design
specifications, analysis and recommendations for presentation and approval
and may specify materials, equipment and supplies required for completion of
projects and may evaluate vendor capabilities to provide required products
or services.
This position requires experience in CAD Development and
Support, experience in flow/methodology development for Custom IC Design,
solid programming experience in PERL and DFII SKILL, demonstrated experience
in developing/customizing/enhancing foundry physical verification rule
decks for DRC/LVS/ERC applications, experience in defining and improving
place and route flow, experience with parasitic RC extraction flow
development and user support, experience in tool maintenance and interface
with tool vendors, working experience with global multi-site teams in a
development/support role and must have excellent communication skills. The
individual must also have experience with Calibre or Hercules or Assura,
experience supporting Cadence custom IC design tools: VCP/CCAR/CSR and be
proficient with DFII SKILL, PERL, experience with StarRCXT/Calibre xRC/
Quickcap is preferred. | a******n
发帖数: 55 | 2 SanDisk
【在 a******n 的大作中提到】
: n this position, the individual will be responsible for developing/
: supporting physical verification rule decks (LVS/DRC/ERC) for the layout
: group, completing placement and routing flow/methodology development,
: developing/supporting/calibrating parasitic extraction flow for design
: groups, developing the CAD flow for memory design as per the layout and
: designing requirements and improving overall productivity for layout group
: through various scripts and SKILL programming. The individual will also
: develop and apply computer aided design (CAD) software engineering methods,
: theories and research techniques in the investigation and solution of
: technical problems, assess architecture and hardware limitations, plan
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