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h******g
发帖数: 36 | 1 【 以下文字转载自 EE 讨论区 】
发信人: huoqiang (job-seeking-period), 信区: EE
标 题: 【面试问题求助】NAND哪个input更快？
发信站: BBS 未名空间站 (Fri Jan 31 13:33:18 2014, 美东)
大家好~~问个面试时候问道的问题
Which input of 2 input NAND gate is faster. ? Why ?
Input that is closes to the output node of NAND gate is faster. It’s input
A in above figure. This is because of we assume that the NMOS closest to the
Vss is already turned on than Vss has effectively moved to the source of
the NMOS near the output of the NAND gate (between A & B NMOS) and hence
there is less resistive path now.
意思就是离output近的NMOS速度快？这段解释不太明白。。求大家帮忙讲一下 | h******g
发帖数: 36 | 2 我理解是，同时给pull down的两个NMOS low_to_high. 下面的NMOS还没完全开，
resistance比较大，Vss传的较慢；当Vss传到 上面NMOS的source时候，这个靠近
output的NMOS已经全开，resistance比较小。。这样解释可以么？ |
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