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EE版 - jobs openings: IC design front end, back end, test 和produ
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ASIC Design Job Openings: Broadcom, Bay Area女生MSEE, EE内方向学的有点杂,找工作,求解惑,求定位
相关话题的讨论汇总
话题: 8226话题: design话题: experience话题: end话题: test
进入EE版参与讨论
1 (共1页)
t*******c
发帖数: 306
1
【 以下文字转载自 Working 讨论区 】
发信人: tieshouzc (tieshouzc), 信区: Working
标 题: jobs openings: IC design front end, back end, test 和product
application
发信站: BBS 未名空间站 (Tue Apr 22 23:55:29 2014, 美东)
我们broadcom有多个IC design front end, back end, test 和product application
job openings,工作地点在santa clara. 我可以内部帮助refer. 要求有相关领域
education或工作经验。
还有一个要求就是最好二年内没有在broadcom网站上投过简历,如果已经投过,请简历上
换一个不同的email,这样也OK(就是不要用在broadcom网站投简历时用的那个email)
(如果要我们公司员工refer,是这样要求的,不好意思)
符合条件的,又感兴趣的,请发信,发简历到b**********[email protected], 我会帮你内部
推荐
z***o
发帖数: 6
2
你好,请问能把job的要求贴出来吗?我也好相应的改下简历,还有就是收不收new
grad?
t*******c
发帖数: 306
3
考虑收new grad
Staff II Physical Design Engineer
Responsibilities include:
Interacting with the architecture team to develop a physical implementation
that can meet the schedule, power, frequency and area design targets.
Implementing the function using custom design techniques and enhanced
synthesis methodology
Insuring circuit based design specifications are met: setup and hold timing,
slew rates, noise, signal and power EM, dynamic and static IR, right sizing
of devices, VT and gate length selection, thermal heating, and power budget.
Job Requirements • Preferred experience required is typically a
BSEE degree and 6 years of experience, an MSEE degree and 3 years of
experience or a PhD EE.
• Practical experience in all steps required to convert RTL into
foundry ready GDS for a high speed CPU in a leading edge process, sub 28
nanometer
• Strong experience with processor implementation or custom circuit
design and key contributor on several product design cycles
• Extensive RTL/physical design background with knowledge of datapath
design and floorplanning a must
• Solid understanding of circuit fundamentals, computer architecture,
and microprocessor design
• Sufficient coding skills to independently develop automation and
parsing scripts
• Demonstrated problem solving and communication skills as well as a
proven abilty to work well within a team
• Familiar with the back end tool suites from the large EDA vendors (
RTL, synthesis, schematic capture, circuit simulation, timing closure(STA),
equivalency check, P&R, power estimation, DFT, extraction, timing, post
layout verification )
• Proficient coding skills – PERL, C, C++, SKILL, TCL, Shell
Scripting; familiar with Linux/Unix environment
• Excellent written and verbal communication skills.
t*******c
发帖数: 306
4
Staff Verification Engineer:
esponsibilities:
• Verify functionality of accelerator blocks of a network processor.
• Develop and execute test-plans for verifying correctness and
performance of the design.
• Own and debug failures in simulation to root-cause problems
• Closely work with logic designers of the block being verified for
test plan development, execution, and debug.
• Closely work with post-silicon validation team on silicon bring-up
of the various features of the network processor.
J2W:LI-VV1
Total engineering minimum experience required is typically a BS degree and
6 years of experience, an MS degree and 3 years of experience or a PhD or
equivalent.
• BS (EE/Electrical Engineering or CS/Computer Science) required, MS (
EE or CS) preferred.
• Strong background in Soc verification methodology and test bench
development using HVL such as Verilog, System Verilog, UVM and C/C++.
• Strong verification skills, understanding of methodology (object
oriented programming, white-box/black-box, directed/random testing, coverage
).
• Prior experience in verification of network packet classification,
packet processing, macsec is desired.
• Prior experience with UNIX/Linux development environment: shell/Perl
scripting is a plus.
• Self-motivated team player able to thrive in a fast-paced
engineering environment.
• Excellent verbal and written communication skills.
t*******c
发帖数: 306
5
还有一些RTL front end, test 之类的,贴在office 墙上,网上没找到link,不
好意思,不能贴出来
b********d
发帖数: 720
6
我还不到换工作的时候
不过想问一下:日常工作大量用示波器,lab view,spice之类做test的,你们
broadcomm招麽?
苦逼转行过来的,总是心虚,不知道科班出身的都会到什么程度
总没有信心,不知道要到什么程度才可以有进一步的打算。。
谢谢你

application
历上
email)

【在 t*******c 的大作中提到】
: 还有一些RTL front end, test 之类的,贴在office 墙上,网上没找到link,不
: 好意思,不能贴出来

1 (共1页)
进入EE版参与讨论
相关主题
女生MSEE, EE内方向学的有点杂,找工作,求解惑,求定位有找工作的吗--半导体公司 招人啦-update 11/7
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job opening - Wireless communication designerASIC Design Job Openings: Broadcom, Bay Area
【工作机会】加州Verification Engineer (转载)Couple ASIC Openings ( San Jose) (转载)
[JOB OPENINGS] 南加州IC公司请教几个VLSI的就业方向
netlogic opening - physical design engineer in CPU group (贴一个非主流的position opening (转载)
Phone interview 求助Open position
相关话题的讨论汇总
话题: 8226话题: design话题: experience话题: end话题: test