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EE版 - FPGA I/O configuration
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话题: fpga话题: 2v话题: output话题: voltage
进入EE版参与讨论
1 (共1页)
b********4
发帖数: 5
1
Hello Everyone,
The output of my Altera DE2 board is 3.3V and I want to convert it to a 1.2V
output voltage.
I am wondering if it is possible that anybody can give me some suggestions
about how to implement the open drain I/O configuration to achieve the 1.2V
output voltage?
Thank you very much!
a****l
发帖数: 8211
2
最简单可靠的就是用电阻.一般的输入都是大阻抗的,应该抗的住.

2V
2V

【在 b********4 的大作中提到】
: Hello Everyone,
: The output of my Altera DE2 board is 3.3V and I want to convert it to a 1.2V
: output voltage.
: I am wondering if it is possible that anybody can give me some suggestions
: about how to implement the open drain I/O configuration to achieve the 1.2V
: output voltage?
: Thank you very much!

d*******l
发帖数: 2567
3
try to find some bus conversion transceiver such as:
http://www.nxp.com/#/pip/pip=[pip=74ALVCH16374_2]|pp=[t=pip,i=74ALVCH16374_2]

2V
2V

【在 b********4 的大作中提到】
: Hello Everyone,
: The output of my Altera DE2 board is 3.3V and I want to convert it to a 1.2V
: output voltage.
: I am wondering if it is possible that anybody can give me some suggestions
: about how to implement the open drain I/O configuration to achieve the 1.2V
: output voltage?
: Thank you very much!

d****o
发帖数: 1112
4
FET,open drain

【在 d*******l 的大作中提到】
: try to find some bus conversion transceiver such as:
: http://www.nxp.com/#/pip/pip=[pip=74ALVCH16374_2]|pp=[t=pip,i=74ALVCH16374_2]
:
: 2V
: 2V

t****i
发帖数: 182
5
If you need it for I2C type of operations (open drain), you will need it to
be a bi-dir FET type of bus level shifter. Simple resistor based voltage div
ider won't work well.
Usual industry device for this type of application can be found with TI and
Philips (NXP). e.g : TVC3306.
http://focus.ti.com/lit/ml/scyb030/scyb030.pdf

2V
2V

【在 b********4 的大作中提到】
: Hello Everyone,
: The output of my Altera DE2 board is 3.3V and I want to convert it to a 1.2V
: output voltage.
: I am wondering if it is possible that anybody can give me some suggestions
: about how to implement the open drain I/O configuration to achieve the 1.2V
: output voltage?
: Thank you very much!

g*****u
发帖数: 14294
6
Level shifter
1 (共1页)
进入EE版参与讨论
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大家来点评一下当前几家大半导体公司的前景问一个关于voltage clamp circuit的问题
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加州 silicon valley, FPGAs, VHDL engineer, Super big company, 6-monthes internship or more请问有这样的level shifter吗?
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DC/DC converterresearch topic (FPGA or lower power related)
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相关话题的讨论汇总
话题: fpga话题: 2v话题: output话题: voltage