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发帖数: 14 | 1 rambus memory is a packet-protocol memory architecture. we
know for a state-of-the-art processor, the memory
performance is, in a lot of cases, the limiting factor of
the overall performance. Simply put, the raw bandwidth and
access latency are two important factors. To get high
bandwith, we have two choices, increasing the memory bus
width, or increasing the memory interface clock rate. Since
Pentium, the x86 has 64-bit memory bus. Some high-end riscs
have more aggressively wider bus, say |
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